Electrical Equipment / Components & Telecoms

Since mid-to-late May, the new crown epidemic has spread rapidly in Southeast Asia and Taiwan Province, and even the vital semiconductor industry cannot be immune. Especially after the successive outbreaks of staff gathering infections in the semiconductor companies of KYEC and Chaofeng Electronics in Zhunan, Miaoli, and after the shutdown of many semiconductor manufacturers in Southeast Asia, the fear of "semiconductor industry chain disconnection" is no longer far away.

Among them, KYEC, which has hundreds of confirmed cases, received the most attention from the outside world, and the epidemic forced it to suspend production at the beginning of June. In the industry chain, KYEC is responsible for the semiconductor "package and testing" link, which is the next stage after TSMC and other chip foundries produce chips, and it is also the first link for semiconductor applications to downstream system factories.

When "key" suppliers in the industry are hit by the epidemic, the already tight semiconductor supply chain becomes even more tight. After all, when the chip is manufactured, if there is no packaging and testing process, the availability cannot be guaranteed, and the chip will be difficult to ship and sell.

The last mile of semiconductor production

The semiconductor manufacturing process consists of several steps including design, manufacturing, testing, and packaging.

Chip packaging and testing is located in the downstream of the industry chain. As the name suggests, semiconductor packaging and testing mainly includes packaging and testing. Packaging refers to the process of processing the tested wafers to obtain independent chips. Testing is to detect defective chips, including wafer testing and testing before packaging. Finished product testing.

The black hard case we often see on flash memory and memory is the result of chip packaging, which has the effect of physically protecting the chip. But in fact, the core of the package is how to realize the physical and electrical interconnection between the chip signal interface electrode and the entire system circuit board.

Advanced packaging technology can significantly improve chip performance and reduce the size. For example, through a packaging process called SiP (System In a Package), Apple's AirPods Pro can greatly reduce the size of the core system and carry various Complex sensors and chips reduce power consumption.

The test is divided into wafer test (pre-stage test) and finished product test (post-stage test). As the name suggests, the wafer test is to test whether the electrical properties of the wafer are normal before the wafer is packaged, and wait until the wafer that has passed the test is packaged before performing the finished product test. The test includes functions, electrical properties and heat dissipation, etc.

As a precision industry, as long as one detail is not noticed in chip manufacturing, such as poor design, cutting corners during foundry, or failing to eliminate defective products during testing, problems will occur in actual use. The packaging and testing of the back-end step becomes the final link to check the quality of the chip, and it is the final goalkeeper of the chip.

Chip packaging and testing industry with specialized division of labor

Like chip foundry manufacturing, packaging and testing has also become a sub-industry with the process of professional division of labor, resulting in a specialized company similar to TSMC.

In the past, major chip manufacturers built their own factories and handled the manufacturing and testing processes in one hand. The biggest advantage of this method is that it can flexibly and effectively control the development of their own products, and the technology will not be spread.

With TSMC’s launch of a division of labor that focuses only on chip production and does not involve chip design, conditions have been created for the birth of a large number of chips with different functions required in mobile phones. It also allows the chips in a mobile phone to no longer be monopolized by a few chip giants.

The same is true for testing. Semiconductor manufacturing processes are becoming more and more complex, and costs and R&D expenses are getting higher and higher. The complexity and difficulty of chip testing have also increased exponentially. Entrusting the packaging and testing process to external parties has become an option, due to technology and profit. The content is relatively low. In the 1980s, packaging and testing became the first link for US chip manufacturers to outsource.

The United States moved its testing factories to Japan, Taiwan and other regions, and the semiconductor industries of the two places began to accumulate and improve gradually. Taiwan ASE, which has the largest market share in the global chip packaging and testing market, emerged during this period. At that time, the founder of ASE chose to enter the chip packaging industry. In addition to the low technical threshold, it is located in the downstream of the industry and the risk is small, and talent acquisition is easier It is also the focus of consideration. As the labor required for packaging and testing is relatively intensive, at that time, Philips, Texas Instruments and other major manufacturers have set up packaging plants in Taiwan.

It is precisely because of the above reasons that in the entire chip manufacturing process, packaging and testing is the easiest link to make breakthroughs and drive the industry's supporting capabilities. According to data from China Semiconductor Industry Association, since 2004, my country's semiconductor packaging and testing industry has maintained rapid development, with a compound annual growth rate of 15.8%. In 2015, Jiangsu Changjiang Electronics Technology, which acquired Singapore's Xingke Jinpeng, has ranked third in the world in scale.

At present, with the exception of a few companies such as Intel who are still insisting on owning their own test plants, most chip manufacturers choose to outsource their chips. Southeast Asia and Taiwan, China, which are hit by the epidemic, are the key towns of the packaging and testing industry.

Does it affect the global chip supply chain

Compared with the chip manufacturing industry with a higher degree of automation, the chip packaging process requires more manpower to operate the machine, which is relatively labor-intensive, so it is more threatened by virus infection.

Take KYEC as an example. Its packaging business includes bare die testing before packaging and final testing after packaging. The former adopts a high degree of automation and is carried out in a clean room above 1,000. The impact of the infection on employees is limited, but the final test The link requires more workers, and it is also the link that has the greatest impact on this wave of infections.

KYEC’s customers include MediaTek for logic chips, Winbond, Macronix, Jinghao for memory, Novatek, Himax, and Intel, Nvidia, STMicroelectronics, NXP, Howell, and Anson for drive chips. United States, Germany Bosch, etc. Among them, MediaTek is also the main customer of KYEC, and its business accounts for 10% of the latter's revenue in 2020.

According to data provided by the research organization TrendForce, KYEC is currently the eighth largest packaging and testing plant with a global market share of 3.7%, and its main customers are MediaTek and Intel. After the outbreak, the company estimates that its June revenue and production capacity will be affected by 30-35%. MediaTek said that KYEC’s plan to stop work after the outbreak will have a partial impact on June revenue.

In response to the epidemic, KYEC took measures to suspend work for 48 hours and conduct cleaning and disinfection last week. During the period, some customers worried that KYEC could not resume work in two days, and the shipment progress would be affected. They urgently transferred orders to ASE and other manufacturers to grab production capacity.

Regarding the impact of transfer orders, the "Lianhe Zaobao" reported that large chip design companies have more testing partners, and the same products are changed to other partner factories for testing, but small chip design companies usually place orders in one test factory and need to transfer Only the transfer card on the machine is needed, and now it is not possible to enter the factory to pull the card. The small factory is shocked, while the big factory is worried that it will not be able to grab the packaging and testing capacity. Recently, the chip is out of stock and the production capacity is in short supply. According to the industry, the biggest impact of KYE’s shutdown is the final testing and packaging. The packaging manpower affects two to three days, and the delivery will be delayed.

Taiwan media quoted a recent brokerage analysis report saying that the KYE epidemic has a slight impact on the global semiconductor industry at this stage, and it has little impact on KYE-related supply chains, including major customers MediaTek and Intel. Because the latter will look for other packaging and testing suppliers to diversify the risk.